Our multinational client, a leading worldwide supplier of high performance semiconductor sensor solutions is in search of a:

This figure will join the R&D team.

Tasks and responsibilities

• analog/digital design of fundamental IP blocks such as Memory IP
• simulation and verification setup for IP blocks
• development of screening/test concepts for memories
• lab validation of IP blocks
• align design activities with external design partner(s)

Qualifications

• required experience in 180nm and smaller technologies
• experienced user of Cadence design environment and Cadence layout tools
• several years of industry experience in mixed mode simulation
• experience in support of RAM/ROM compiler
• basic understanding of compact design and layout of a RAM bitcell
• good communication skills and fluent English (verbal and writing)
• good team player, experience with coordination of cross-functional team members is an additional plus